View TDA6500_433221.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
Rev. 02 -- 14 June 2005 Product data sheet
1. General description
TDA6500TT and TDA6501TT are programmable 2-mixer, 3-oscillator and synthesizer MOPLLs intended for pure 3-band tuner concepts. The device includes two double balanced mixers for the low and mid/high bands and three oscillators for the low, mid and high bands, respectively. Other functions are an IF amplifier, a wide-band AGC detector and a PLL synthesizer. Two pins are available between the mixer output and the IF amplifier input to enable IF filtering for improved signal handling. The device can be controlled according to the I2C-bus format.
2. Features
s Single-chip, 5 V mixer/oscillator and synthesizer for TV and VCR tuners s I2C-bus protocol compatible with 3.3 V and 5 V microcontrollers: x Address + 6 data bytes transmission x Address + 1 status byte (I2C-bus read mode) x Four independent I2C-bus addresses s Two PMOS open-drain ports with 5 mA source capability to switch high band and FM sound trap (P2 and P3) s One PMOS open-drain port P1 with 20 mA source capability to switch the mid band s One PMOS open-drain port P0 with 10 mA source capability to switch the low band s Five step, 3-bit Analog-to-Digital Converter (ADC) and NPN open-collector general purpose port P6 with 5 mA sinking capability s NPN open-collector general purpose port P4 with 5 mA sinking capability s Internal AGC flag s In-lock flag s 33 V tuning voltage output s 15-bit programmable divider s Programmable reference divider ratio: 64, 80 or 128 s Programmable charge pump current: 60 A or 280 A s Varicap drive disable s Balanced mixer with a common emitter input for the low band (single input) s Balanced mixer with a common base input for the mid and high bands (balanced input) s 2-pin asymmetrical oscillator for the low band s 2-pin asymmetrical oscillator for the mid band s 4-pin symmetrical oscillator for the high band
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
s IF preamplifier with asymmetrical 75 output impedance to drive a SAW filter (500 /40 pF) s Wide-band AGC detector for internal tuner AGC: x Five programmable take-over points x Two programmable time constants
3. Applications
s TV and VCR tuners s Specially suited for switched concepts, all systems s Specially suited for strong off-air reception
4. Ordering information
Table 1: Ordering information Package Name TDA6500TT TDA6501TT TSSOP32 Description Version plastic thin shrink small outline package; 32 leads; SOT487-1 body width 6.1 mm; lead pitch 0.65 mm Type number
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
2 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
5. Block diagram
VCC 10 (23) VCC (8) 25 (6) 27 (5) 28 AGC IFFIL1 IFFIL2
VSTAB STABILIZER
AL0, AL1, AL2 ATC
AGC DETECTOR
AGC
SAW DRIVER
(21) 12 (22) 11
IFOUT IFGND
LBIN RFGND
30 (3) 29 (4) RF INPUT LOW MIXER LOW LOW OSCILLATOR
(31) 2 (32) 1
LOSCOUT LOSCIN
P0 P0
(30) 3
OSCGND
(29) 4 MID OSCILLATOR MHBIN1 MHBIN2 31 (2) 32 (1) RF INPUT MID + HIGH MIXER MID + HIGH P1 (27) 6 (26) 7 HIGH OSCILLATOR P1 + P0 . P1 P0 . P1 XTAL 14 (19) CRYSTAL OSCILLATOR REFERENCE DIVIDER 64, 80, 128 RSA RSB fref PHASE COMPARATOR fdiv T0, T1, T2 CP LOCK DETECTOR FL CHARGE PUMP Vref OS (25) 8 (24) 9 (28) 5
MOSCOUT MOSCIN
HOSCIN1 HOSCOUT2 HOSCOUT1 HOSCIN2
(17) 16 (18) 15
CP VT
PLLGND
13 (20)
OPAMP
15-BIT PROGRAMMABLE DIVIDER
TDA6500TT (TDA6501TT)
15-BIT FREQUENCY REGISTER
CONTROL REGISTER
SCL SDA AS
20 (13) 19 (14) 21 (12) I2C-BUS TRANSCEIVER 1 CP T2 T1 T0 RSA RSB OS
AUXILIARY REGISTER
STATUS REGISTER fref POR FL AGC 3-BIT ADC GATE T0, T1, T2 fdiv
ATC AL2 AL1 AL0
0
0
0
0
BAND SWITCH REGISTER P6 0 0 17 22 26 (16) (11) (7) P4 P3 P2 24 (9) P1 23 (10) P0
POWER ON RESET
18 (15) P6/ADC
mce149
Fig 1. Block diagram
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
3 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
6. Pinning information
6.1 Pinning
LOSCIN LOSCOUT OSCGND MOSCOUT MOSCIN HOSCIN1 HOSCOUT2 HOSCOUT1 HOSCIN2
1 2 3 4 5 6 7 8 9
32 MHBIN2 31 MHBIN1 30 LBIN 29 RFGND 28 IFFIL2 27 IFFIL1 26 P2 25 AGC 24 P1 23 P0 22 P3 21 AS 20 SCL 19 SDA 18 P6/ADC 17 P4
001aac943
MHBIN2 MHBIN1 LBIN RFGND IFFIL2 IFFIL1 P2 AGC P1
1 2 3 4 5 6 7 8 9
32 LOSCIN 31 LOSCOUT 30 OSCGND 29 MOSCOUT 28 MOSCIN 27 HOSCIN1 26 HOSCOUT2 25 HOSCOUT1 24 HOSCIN2 23 VCC 22 IFGND 21 IFOUT 20 PLLGND 19 XTAL 18 VT 17 CP
001aac944
TDA6500TT
TDA6501TT
VCC 10 IFGND 11 IFOUT 12 PLLGND 13 XTAL 14 VT 15 CP 16
P0 10 P3 11 AS 12 SCL 13 SDA 14 P6/ADC 15 P4 16
Fig 2. Pin configuration for TDA6500TT
Fig 3. Pin configuration for TDA6501TT
6.2 Pin description
Table 2: Symbol AGC AS CP HOSCIN1 HOSCIN2 Pin description Pin TDA6500TT TDA6501TT 25 21 16 6 9 8 12 17 27 24 25 26 6 5 22 21 3 32 31 2 1 28 AGC output address selection input charge pump output high band oscillator input 1 high band oscillator input 2 high band oscillator output 1 high band oscillator output 2 IF filter output 1 IF filter output 2 IF ground IF output low band RF input low band oscillator input low band oscillator output mid and high band RF input 1 mid and high band RF input 2 mid band oscillator input
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Description
HOSCOUT1 8 HOSCOUT2 7 IFFIL1 IFFIL2 IFGND IFOUT LBIN LOSCIN LOSCOUT MHBIN1 MHBIN2 MOSCIN
9397 750 15057
27 28 11 12 30 1 2 31 32 5
Product data sheet
Rev. 02 -- 14 June 2005
4 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
Pin description ...continued Pin TDA6500TT TDA6501TT 4 3 23 24 26 22 17 18 13 29 20 19 10 15 14 29 30 10 9 7 11 16 15 20 4 13 14 23 18 19 Description mid band oscillator output oscillator ground PMOS open-drain port 0 to select low band operation PMOS open-drain port 1 to select mid band operation PMOS open-drain general purpose port 2 PMOS open-drain general purpose port 3 NPN open-collector general purpose port 4 NPN open-collector general purpose port 6 or ADC input digital ground RF ground serial clock input serial data input and output supply voltage tuning voltage output crystal oscillator input
Table 2: Symbol MOSCOUT OSCGND P0 P1 P2 P3 P4 P6/ADC PLLGND RFGND SCL SDA VCC VT XTAL
7. Functional description
7.1 General
TDA6500TT and TDA6501TT are programmable 2-mixer, 3-oscillator and synthesizer MOPLLs intended for pure 3-band tuner concepts. The device includes two double balanced mixers for the low and mid/high bands and three oscillators for the low, mid and high bands respectively. The band limits for PAL tuners are shown in Table 3.
Table 3: Band Low Mid High Low, mid and high band limits Input fRFpix (MHz) Min 45.25 161.25 455.25 Max 154.25 439.25 855.25 Oscillator fosc (MHz) Min 84.15 200.15 494.15 Max 193.15 478.15 894.15
Other functions are an IF amplifier, a wide-band AGC detector and a PLL synthesizer. Two pins are available between the mixer output and the IF amplifier input to enable IF filtering for improved signal handling. Bit P0 enables Port P0 and the low band mixer and oscillator (see Table 4). Bit P1 enables Port P1, the mid/high band mixer and the mid band oscillator. Bit P2 enables Port P2 and bit P3 enables Port P3. When Ports P0 and P1 are disabled, the mid/high band mixer and the high band oscillator are enabled.
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
5 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
Mixer and oscillator band selection Mixer band P1 0 1 0 low x x x x x mid high Oscillator band low x x x mid high
Table 4: Bit P0 1 0 0
The AGC detector provides information about the IF amplifier level. Five AGC take-over points are available by software. Two programmable AGC time constants are available for search tuning and normal tuner operation. The synthesizer consists of a 15-bit programmable divider, a crystal oscillator and its programmable reference divider and a phase/frequency detector combined with a charge pump, which drives the tuning amplifier including 33 V output. Depending on the reference divider ratio (64, 80 or 128) the phase comparator operates at 62.50 kHz, 50.00 kHz or 31.25 kHz with a 4 MHz crystal. The device can be controlled according to the I2C-bus format. The lock detector bit FL is set to logic 1 when the loop is locked. The AGC bit is set to logic 1 when the internal AGC is active (level below 3 V). These two flags are read on the SDA line (status byte) during a read operation (see Table 11). The ADC input is available on pin P6/ADC for digital AFC control. The ADC code is read during a read operation (see Table 11). In test mode, pin P6/ADC is used as a test output for 12fref and 12fdiv (see Table 8). A minimum of seven bytes, including address byte, is required to address the device, select the VCO frequency, program the ports, set the charge pump current, set the reference divider ratio, select the AGC take-over point and select the AGC time constant. The device has four independent I2C-bus addresses which can be selected by applying a specific voltage on input AS (see Table 7).
7.2 Device control
The device is controlled via the I2C-bus. For programming, a module address of 7 bits and the R/W bit for selecting the read or the write mode is required.
7.2.1 Write mode
Data bytes can be sent to the device after the address transmission (first byte). Seven data bytes are needed to fully program the device. The bus transceiver has an auto-increment facility, which permits the programming of the device within one single transmission (address + 6 data bytes). The device can also be partially programmed providing that the first data byte following the address is the first divider byte DB1 or the control byte CB. The data bytes are defined in Table 5 and Table 6. The first bit of the first data byte indicates whether frequency data (first bit = 0) or control, port and auxiliary data (first bit = 1) will follow. Until an I2C-bus STOP command is sent by the controller, additional data bytes can be entered without the need to re-address the device. The frequency register is loaded with data from byte DB2 after the 8th SCL clock
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
6 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
pulse, the control register is loaded with data from byte CB after the 8th SCL clock pulse, the band switch register is loaded with data of byte BB after the 8th SCL clock pulse and the auxiliary register is loaded with data of byte AB after the 8th SCL clock pulse. To program the AGC take-over point setting and the AGC current to a different value than the default value, an additional byte, the auxiliary byte, has to be sent. To this end, the auxiliary byte is preceded by a control byte with the test bits T2, T1 and T0 set to logic 011 (see Table 8).
Table 5: Name Address byte Divider byte 1 Divider byte 2 Control byte Auxiliary byte [1]
[1]
I2C-bus data format for write mode Byte ADB DB1 DB2 CB AB Bit MSB 1 0 N7 1 0 ATC 1 N14 N6 CP P6 AL2 0 N13 N5 T2 0 AL1 0 N12 N4 T1 P4 AL0 0 N11 N3 T0 P3 0 MA1 N10 N2 RSA P2 0 MA0 N9 N1 RSB P1 0 LSB R/W = 0 A N8 N0 OS P0 0 A A A A A Ack
Band switch byte BB
Auxiliary byte AB replaces band switch byte BB when bit T2 = 0, T1 = 1 and T0 = 1.
Table 6: Symbol A
Description of bits shown in Table 5 Description acknowledge programmable address bits; see Table 7 logic 0 for write mode programmable divider bits; N = (N14 x 214) + (N13 x 213) + ... + (N1 x 21) + N0 charge pump current CP = 0: the charge pump current is 60 A CP = 1: the charge pump current is 280 A (default)
MA1 and MA0 R/W N14 to N0 CP
T2, T1 and T0 RSA and RSB OS
test bits; see Table 8 reference divider ratio select bits; see Table 9 tuning amplifier control bit OS = 0: normal operation; tuning voltage is on OS = 1: tuning voltage is off; high-impedance state (default)
P6 and P4
NPN port control bits Pn = 0: port n is off; high-impedance state (default) Pn = 1: buffer n is on; VO = VCE(sat)
P3 to P0
PMOS port control bits Pn = 0: port n is off; high-impedance state (default) Pn = 1: buffer n is on; VO = VCC - VDS(sat)
ATC
AGC time constant ATC = 0: IAGC = 220 nA; t = 2 s with C = 160 nF (default) ATC = 1: IAGC = 9 A; t = 50 ms with C = 160 nF
AL2, AL1 and AL0
9397 750 15057
AGC take-over point bits; see Table 10
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
7 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
The module address contains programmable address bits (MA1 and MA0) which offer the possibility of having up to 4 synthesizers in one system by applying a specific voltage on the AS input. Table 7 gives the relationship between the input voltage applied to the AS input and bits MA1 and MA0.
Table 7: I2C-bus address selection MA1 0 0 1 1 MA0 0 1 0 1
Voltage applied to pin AS 0 V to 0.1VCC 0.2VCC to 0.3VCC or open 0.4VCC to 0.6VCC 0.9VCC to VCC Table 8: T2 0 0 0 0 1 1 1 1
[1]
Test modes T1 0 0 1 1 1 1 0 0 T0 0 1 0 1 0 1 0 1 Test modes normal mode normal mode; default mode at power-on reset charge pump is off control byte is followed by auxiliary byte AB instead of the band switch byte BB charge pump is sinking current charge pump is sourcing current
1 f 2 ref 1 f 2 div
is available on pin P6/ADC [1] is available on pin P6/ADC [1]
The ADC input cannot be used when these test modes are active; see Section 7.2.2 for more information.
Table 9: RSA 0 0 1 1 Table 10: AL2 0 0 0 0 1 1 1 1
[1] [2]
9397 750 15057
Reference divider ratio select RSB 0 1 1 0 Reference divider ratio 80 128 64 forbidden
AGC take-over point AL1 0 0 1 1 0 0 1 1 AL0 0 1 0 1 0 1 0 1 Asymmetrical mode 115 dBV 115 dBV 112 dBV; default mode at power-on reset 109 dBV 106 dBV 103 dBV IAGC = 0 mA; external AGC [1] 3.5 V; disabled [1]
The AGC detector is disabled. Both the sinking and sourcing currents from the IC are disabled. The AGC output goes into a high-impedance state and an external AGC source can be connected in parallel. The AGC detector is disabled and the fast mode current source is enabled.
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
8 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
7.2.2 Read mode
Data can be read from the device by setting the R/W bit to logic 1. The data read format is shown in Table 11. After the slave address has been recognized, the device generates an acknowledge pulse and the first data byte (status byte) is transferred on the SDA line with the MSB first. Data is valid on the SDA line during a HIGH-level of the SCL clock signal. A second data byte can be read from the device if the microcontroller generates an acknowledge on the SDA line (master acknowledge). End of transmission will occur if no master acknowledge occurs. The device will then release the data line to allow the microcontroller to generate a STOP condition. The POR flag is set to logic 1 at power-on. The flag is reset when an end-of-data is detected by the device (end of a read sequence). Control of the loop is made possible with the in-lock flag (FL) which indicates when the loop is locked (FL = 1). The internal AGC status is available from the AGC bit. AGC = 1 indicates when the selected take-over point is reached. A built-in ADC is available on the P6/ADC pin. The ADC can be used to apply AFC information to the microcontroller from the IF section of the tuner. The relationship between the voltage applied to the ADC input and the A2, A1 and A0 bits is given in Table 13.
Table 11: Name Address byte Status byte
[1]
Read data format Byte ADB SB Bit MSB [1] 1 POR 1 FL 0 1 0 1 0 AGC MA1 A2 MA0 A1 LSB R/W = 1 A A0 Ack
MSB is transmitted first.
Table 12: Symbol A
Description of bits shown in Table 11 Description acknowledge programmable address bits; see Table 7 logic 1 for read mode power-on reset flag POR = 0, normal operation POR = 1, power-on state
MA1 and MA0 R/W POR
FL
in-lock flag FL = 0, not locked FL = 1, the PLL is locked
AGC
internal AGC flag AGC = 0, internal AGC not active AGC = 1, internal AGC is active; level below 3 V
A2, A1 and A0
digital output of the 5-level ADC; see Table 13
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
9 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
ADC levels A2 1 0 0 0 0 A1 0 1 1 0 0 A0 0 1 0 1 0
Table 13:
Voltage applied to ADC input [1] 0.60VCC to VCC 0.45VCC to 0.60VCC 0.30VCC to 0.45VCC 0.15VCC to 0.30VCC 0 V to 0.15VCC
[1] Accuracy is 0.03VCC.
7.2.3 Power-on reset
The power-on detection threshold voltage is set to VPOR = 3.5 V at room temperature. Below this threshold, the device is reset to the power-on state. In the power-on state, the charge pump current is set to 280 A, the tuning voltage output is disabled, the test bits T2 = 0, T1 = 0 and T0 = 1, the AGC take-over point is set to 112 dBV and the AGC current is set to the slow mode. The high band is selected by default.
Table 14: Name Address byte Divider byte 1 Divider byte 2 Control byte Band switch byte Auxiliary byte Default bits at power-on reset Byte ADB DB1 DB2 CB BB AB Bit MSB 1 0 X 1 0 1 X X 1 0 0 0 X X 0 1 0 X X 0 0 0 0 X X 1 0 MA1 X X X 0 MA0 X X X 0 LSB X X X 1 0 -
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
10 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
8. Internal circuitry
Table 15: Symbol Internal circuits Pin TDA6500TT LOSCIN LOSCOUT 1 2 TDA6501TT 32 31 Average DC voltage versus band selection Low 1.7 2.9 Mid 1.4 3.5 High 1.4 3.5
2 (31) (32) 1
Equivalent circuit [1]
fce222
OSCGND MOSCOUT MOSCIN
3 4 5
30 29 28
3.5 1.4
3.02 1.7
3.5 1.4
-
4 (29) (28) 5
fce223
HOSCIN1 HOSCOUT2 HOSCOUT1 HOSCIN2
6 7 8 9
27 26 25 24
2.2 5 5 2.2
2.2 5 5 2.2
1.8 2.5 2.5 1.8
(25) 8 (27) 6 7 (26) 9 (24)
mce141
VCC IFGND
10 11
23 22
5.0 -
5.0 -
5.0 -
-
11 (22)
fce225
IFOUT
12
21
2.1
2.1
2.1
12 (21)
fce226
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
11 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
Table 15: Symbol
Internal circuits ...continued Pin TDA6500TT TDA6501TT 20 Average DC voltage versus band selection Low Mid High 13 (20)
fce227
Equivalent circuit [1]
PLLGND
13
XTAL
14
19
0.7
0.7
0.7
14 (19)
mce142
VT
15
18
VVT
VVT
VVT
15 (18)
mce143
CP
16
17
1.0
1.0
1.0
16 (17)
mce144
P4
17
16
VCE(sat) or High Z
VCE(sat) or High Z
VCE(sat) or High Z
17 (16)
mce145
P6/ADC
18
15
VCE(sat) or High Z
VCE(sat) or High Z
VCE(sat) or High Z
(15) 18
mce146
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
12 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
Table 15: Symbol
Internal circuits ...continued Pin TDA6500TT TDA6501TT 14 Average DC voltage versus band selection Low
n.a.
Equivalent circuit [1]
Mid
n.a.
High
n.a.
SDA
19
(14) 19
mce147
SCL
20
13
n.a.
n.a.
n.a.
(13) 20
fce234
AS
21
12
1.25
1.25
1.25
(12) 21
fce235
P3
22
11
High Z or VCC - VDS
High Z or VCC - VDS
High Z or VCC - VDS
22 (11)
fce236
P0
23
10
VCC - VDS
High Z
High Z
23 (10)
fce237
P1
24
9
High Z
VCC - VDS
High Z
24 (9)
fce238
AGC
25
8
0 V or 3.5 V
0 V or 3.5 V
0 V or 3.5 V
25 (8)
fce239
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
13 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
Table 15: Symbol
Internal circuits ...continued Pin TDA6500TT TDA6501TT 7 Average DC voltage versus band selection Low High Z or VCC - VDS Mid High Z or VCC - VDS High High Z or VCC - VDS
26 (7)
fce240
Equivalent circuit [1]
P2
26
IFFIL1 IFFIL2
27 28
6 5
4.4 4.4
4.4 4.4
4.4 4.4
27 (6) 28 (5)
fce241
RFGND
29
4
-
-
29 (4)
fce242
LBIN
30
3
1.8
n.a.
n.a.
(3) 30
fce243
MHBIN1 MHBIN2
31 32
2 1
n.a. n.a.
1.0 1.0
1.0 1.0
(2) 31 32 (1)
mce148
[1]
The pin numbers in parenthesis represent the TDA6501TT.
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
14 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
9. Limiting values
Table 16: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). [1] Symbol VCC VXTAL VP6/ADC IP6/ADC VVT VCP VP4 IP4 VSDA ISDA VSCL VAS VPn IP1 IP0 IP2, IP3 Tstg Tamb Tj
[1]
Parameter supply voltage crystal input voltage NPN port input and output voltage NPN port output current (open-collector) tuning voltage output charge pump output voltage NPN port output voltage (open-collector) NPN port output current (open-collector) serial data input/output voltage serial data output current serial clock input voltage address selection input voltage PMOS port output voltage (open-drain) PMOS port output current (open-drain) PMOS port output current (open-drain) PMOS port output current (open-drain) storage temperature ambient temperature junction temperature
Conditions
Min -0.3 -0.3 -0.3 0 -0.3 -0.3 -0.3 0 -0.3 -1 -0.3 -0.3 -0.3 -25 -15 -10 -40 -20 -
Max +6 VCC + 0.3 VCC + 0.3 10 +35 VCC + 0.3 VCC + 0.3 10 +6 +10 +6 VCC + 0.3 VCC + 0.3 0 0 0 +150 +85 150
Unit V V V mA V V V mA V mA V V V mA mA mA C C C
Maximum ratings cannot be exceeded, not even momentarily without causing irreversible IC damage. Maximum ratings cannot be accumulated.
10. Thermal characteristics
Table 17: Symbol Rth(j-a) Thermal characteristics Parameter thermal resistance from junction to ambient Conditions in free air; one layer printed-circuit board, JEDEC standards in free air; one layer printed-circuit board, JEDEC standards
[1]
Typ 110
Unit K/W
SOT487EC3 package (TDA6500TT)
SOT487EC5 package (TDA6501TT) Rth(j-a) thermal resistance from junction to ambient
[1]
115
K/W
[1]
The thermal resistance is highly dependant on the printed-circuit board on which the package is mounted. The thermal resistance values are given only for customer's guidance.
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
15 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
11. Characteristics
Table 18: Supplies VCC = 5 V; Tamb = 25 C; values are given for an IF amplifier with 500 load (measured as shown in Figure 7 for the PAL standard); unless otherwise specified. Symbol Supply VCC ICC supply voltage supply current all PNP ports off one PNP port on; sourcing 20 mA two PNP ports on; one port sourcing 20 mA; one other port sourcing 5 mA 4.5 5.0 74 96 102 5.5 94 116 122 V mA mA mA Parameter Conditions Min Typ Max Unit
Table 19: PLL VCC = 5 V; Tamb = 25 C; values are given for an IF amplifier with 500 load (measured as shown in Figure 7 for the PAL standard); unless otherwise specified. Symbol VPOR N fXTAL ZXTAL Parameter power-on reset supply voltage divider ratio input impedance (absolute value) output leakage current output saturation voltage output saturation voltage output saturation voltage Conditions for a voltage lower than VPOR, power-on reset is active 15-bit frequency word fXTAL = 4 MHz Min 1.5 64 3.2 600 Typ 3.5 4.0 1200 Max 32767 4.48 MHz Unit V Functional range
crystal oscillator frequency RXTAL = 25 to 300
PMOS ports: P0, P1, P2 and P3 ILO VDS(P0)(sat) VDS(P1)(sat) VDS(P2)(sat), VDS(P3)(sat) ILO VCE(sat) ADC input VI IIH IIL IIH IIL VIL VIH IIH ADC input voltage HIGH-level input current LOW-level input current HIGH-level input current LOW-level input current LOW-level input voltage HIGH-level input voltage HIGH-level input current VBUS = 5.5 V; VCC = 0 V VBUS = 5.5 V; VCC = 5.5 V
9397 750 15057
VCC = 5.5 V; VPn = 0 V buffer P0 is on only; sourcing 10 mA buffer P1 is on only; sourcing 20 mA buffer P2 or P3 is on; sourcing 5 mA
-
0.25 0.25 0.25
10 0.4 0.4 0.4
A V V V
NPN ports: P4 and P6 output leakage current output saturation voltage VCC = 5.5 V; VPn = 6 V buffer P4 or P6 is on; sinking 5 mA see Table 13 ADC input Vi = VCC ADC input Vi = 0 V AS input Vi = VCC AS input Vi = 0 V 0 -10 -10 0 2.3 0.25 10 0.4 VCC 10 10 1.5 5.5 10 10 A V V A A A A V V A A
AS input (address selection)
SCL and SDA inputs
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
16 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
Table 19: PLL ...continued VCC = 5 V; Tamb = 25 C; values are given for an IF amplifier with 500 load (measured as shown in Figure 7 for the PAL standard); unless otherwise specified. Symbol IIL SDA output ILO Vo fclk IIH IIL ILO(off) ILO(off) Vo leakage current output voltage clock frequency HIGH-level input current (absolute value) LOW-level input current (absolute value) off-state leakage current off-state leakage current output voltage when the loop is closed CP = 1 CP = 0 T2 = 0; T1 = 1; T0 = 0 OS = 1; VVT = 33 V OS = 0; T2 = 0; T1 = 0; T0 = 1; RL = 27 k; VVT = 33 V SDA output Vo = 5.5 V Io(sink) = 3 mA -15 0.2 280 60 0 10 0.4 400 +15 10 32.7 A V kHz A A nA A V Parameter LOW-level input current Conditions VBUS = 1.5 V; VCC = 0 V VBUS = 0 V; VCC = 5.5 V Min -10 Typ Max 10 Unit A A
Clock frequency Charge pump output CP
Tuning voltage output VT
Table 20: Mixer VCC = 5 V; Tamb = 25 C; values are given for an IF amplifier with 500 load (measured as shown in Figure 7 for the PAL standard); unless otherwise specified. Symbol fRF Gv NF Vo(mod) Parameter RF frequency voltage gain noise figure output voltage causing 0.3 % cross modulation in channel output voltage causing 1.1 kHz incidental FM channel SO2 beat input level without lock-out Conditions picture carrier fRF = 44.25 MHz; see Figure 8 fRF = 157 MHz; see Figure 8 fRF = 50 MHz; see Figure 9 and 10 fRF = 44.25 MHz; see Figure 12 fRF = 157 MHz; see Figure 12 fRF = 44.25 MHz fRF = 157 MHz VRFpix = 115 dBV at IF output see Figure 11
[2] [2] [3] [4] [1]
Min 44.25 25.0 25.0 108 108 108 108 57 -
Typ 27.5 27.5 8.0 111 111 111 111 60 0.7 0.9 0.30 0.33 1.29
Max
Unit
Low band mixer mode (P0 = 1 and P1 = 0); including IF amplifier 154.25 MHz 30 30 10.0 120 dB dB dB dBV dBV dBV dBV dBc dBV mS mS mS mS pF
Vo(FM) INTSO2 Vi gos gi Ci
optimum source fRF = 50 MHz conductance for noise figure f = 150 MHz RF input conductance input capacitance fRF = 44.25 MHz; see Figure 4 fRF = 161.25 MHz; see Figure 4 fRF = 44.25 to 161.25 MHz; see Figure 4 picture carrier
[1]
High band mixer in mid band mode (P0 = 0 and P1 = 1); including IF amplifier fRF
9397 750 15057
RF frequency
161.25 -
439.25 MHz
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
17 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
Table 20: Mixer ...continued VCC = 5 V; Tamb = 25 C; values are given for an IF amplifier with 500 load (measured as shown in Figure 7 for the PAL standard); unless otherwise specified. Symbol Gv NF Vo(mod) Parameter voltage gain noise figure (not corrected for image) output voltage causing 0.3 % cross modulation in channel output voltage causing 1.1 kHz incidental FM (N + 5) - 1 MHz pulling Conditions fRF = 157 MHz; see Figure 13 fRF = 443 MHz; see Figure 13 fRF = 157 MHz; see Figure 14 fRF = 443 MHz; see Figure 14 fRF = 157 MHz; see Figure 15 fRF = 443 MHz; see Figure 15 fRF = 157 MHz fRF = 443 MHz fRFwanted = 443 MHz; fosc = 481.9 MHz; fRFunwanted = 482 MHz RS at fRF = 443 MHz; see Figure 5 LS at fRF = 157 MHz; see Figure 5 LS at fRF = 443 MHz; see Figure 5 Vi fRF Gv NF Vo(mod) input level without lock-out RF frequency voltage gain noise figure (not corrected for image) output voltage causing 0.3 % cross modulation in channel output voltage causing 1.1 kHz incidental FM (N + 5) - 1 MHz pulling see Figure 16 picture carrier fRF = 443 MHz; see Figure 13 fRF = 863.25 MHz; see Figure 13 fRF = 443 MHz; see Figure 14 fRF = 863.25 MHz; see Figure 14 fRF = 443 MHz; see Figure 15 fRF = 863.25 MHz; see Figure 15 fRF = 443 MHz fRF = 863.25 MHz fRFwanted = 863.25 MHz; fosc = 902.15 MHz; fRFunwanted = 902.25 MHz RS at fRF = 863.25 MHz; see Figure 5 LS at fRF = 443 MHz; see Figure 5 LS at fRF = 863.25 MHz; see Figure 5 Vi
[1] [2]
[2] [2] [5] [4] [2] [2] [5]
Min 35 35 108 108 108 108 72 -
Typ 38 38 6 6 111 111 111 111 80 25 25 13 13 -
Max 41 41 8.0 8.0 120
Unit dB dB dB dB dBV dBV dBV dBV dBV nH nH dBV
Vo(FM) Vf(N+5)-1 Zi
input impedance (RS + jLS) RS at fRF = 157 MHz; see Figure 5
High band mixer in high band mode (P0 = 0 and P1 = 0); including IF amplifier
[1]
455.25 35 35 108 108 108 108 72 38 38 6.0 7.0 111 111 111 111 80
855.25 MHz 41 41 8.0 9.0 dB dB dB dB dBV dBV dBV dBV dBV
Vo(FM) Vf(N+5)-1
Zi
input impedance (RS + jLS) RS at fRF = 443 MHz; see Figure 5
[4]
25 23 13 13 -
120
nH nH dBV
input level without lock-out
see Figure 16
-
The RF frequency range is defined by the oscillator frequency range and the Intermediate Frequency (IF). This is the level of the RF unwanted signal, 50 % amplitude modulated with 1 kHz, that causes a 1.1 kHz FM modulation of the local oscillator and thus of the wanted signal; Vwanted = 100 dBV; funwanted = fwanted + 5.5 MHz. The FM modulation is measured at the oscillator output with a peeking coil using a modulation analyzer with a peak-to-peak detector and a post detection filter of 300 Hz up to 3 kHz. Channel SO2 beat is the interfering product of fRFpix, fIF and fosc of channel SO2; fbeat = 37.35 MHz. The possible mechanisms are: fosc - 2 x fIF or 2 x fRFpix - fosc. For the measurement Vo(IFOUT) = VRFpix = 115 dBV.
[3]
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
18 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
[4] [5]
The IF output signal stays stable within the range of the fref step for a low level RF input up to 120 dBV. This should be verified for every channel in the band. (N + 5) - 1 MHz pulling is the input level of channel N + 5, at frequency 1 MHz lower, causing FM sidebands 30 dB below the wanted carrier.
1 2 0.5
5 10
0.2
10
+j 10 5 2 1 0.5 0.2 40 MHz 140 MHz 5 0.2 0 -j
2 1
0.5
mce150
Fig 4. Input admittance (S11) of the low band mixer (40 MHz to 140 MHz); Yo = 20 mS
1 0.5 2 870 MHz 0.2 5 10 0 -j 10 0.2 5 160 MHz 0.2 0.5 1 2 5 10
+j
0.5 1
2
mce151
Fig 5. Input impedance (S11) of the mid and high band mixer (160 MHz to 870 MHz); Zo = 100
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
19 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
Table 21: Oscillator VCC = 5 V; Tamb = 25 C; values are given for an IF amplifier with 500 load (measured as shown in Figure 7 for the PAL standard); unless otherwise specified. Symbol fosc fosc(V) fosc(T) fosc(t) osc Parameter oscillator frequency oscillator frequency shift with supply voltage oscillator frequency drift with temperature VCC = 5 % VCC = 10 % T = 25 C; VCC = 5 V with compensation Conditions
[1] [2] [2] [3]
Min 84.15 84 104
[5]
Typ 20 110 800 500 87 107 20
Max
Unit
Low band oscillator 193.15 MHz 70 1100 700 kHz kHz kHz kHz dBc/Hz dBc/Hz mV
oscillator frequency switch-on 5 s to 15 min after switching on drift VCC = 5 V phase noise, carrier-to-noise sideband 10 kHz frequency offset; worst case in the frequency range 100 kHz frequency offset; worst case in the frequency range
[4]
RSCp-p
ripple susceptibility of VCC (peak-to-peak value)
4.75 V < VCC < 5.25 V; worst case in the frequency range; ripple frequency 500 kHz
15
Mid band oscillator fosc fosc(V) fosc(T) fosc(t) osc oscillator frequency oscillator frequency shift with supply voltage oscillator frequency drift with temperature oscillator frequency drift after switch-on phase noise, carrier-to-noise sideband VCC = 5 % VCC = 10 % T = 25 C; VCC = 5 V with compensation 5 s to 15 min after switching on VCC = 5 V 10 kHz frequency offset; worst case in the frequency range 100 kHz frequency offset; worst case in the frequency range RSCp-p ripple susceptibility of VCC (peak-to-peak value) 4.75 V < VCC < 5.25 V; worst case in the frequency range; ripple frequency 500 kHz
[5] [1] [2] [2] [3]
200.15 84 104 15 20 110 1000 500 87 107 20
478.15 MHz 70 1500 700 kHz kHz kHz kHz dBc/Hz dBc/Hz mV
[4]
High band oscillator fosc fosc(V) fosc(T) fosc(t) oscillator frequency oscillator frequency shift with supply voltage oscillator frequency drift with temperature oscillator frequency drift after switch-on VCC = 5 % VCC = 10 % T = 25 C; VCC = 5 V with compensation 5 s to 15 min after switching on VCC = 5 V
[1] [2] [2] [3]
494.15 20 300 1100 600
894.15 MHz 70 1500 900 kHz kHz kHz kHz
[4]
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
20 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
Table 21: Oscillator ...continued VCC = 5 V; Tamb = 25 C; values are given for an IF amplifier with 500 load (measured as shown in Figure 7 for the PAL standard); unless otherwise specified. Symbol osc Parameter phase noise, carrier-to-noise sideband Conditions 10 kHz frequency offset; worst case in the frequency range 100 kHz frequency offset; worst case in the frequency range RSCp-p ripple susceptibility of VCC (peak-to-peak value) 4.75 V < VCC < 5.25 V; worst case in the frequency range; ripple frequency 500 kHz
[5]
Min 84 104 15
Typ 87 107 20
Max -
Unit dBc/Hz dBc/Hz mV
[1] [2] [3] [4] [5]
Limits are related to the tank circuits used in Figure 7 for a PAL application. The choice of different external components adapts the measurement circuit to other frequency bands or NTSC applications. The frequency shift is defined as a change in oscillator frequency when the supply voltage varies from VCC = 5 V to 4.75 V (4.5 V) or from VCC = 5 V to 5.25 V (5.5 V). The oscillator is free running during this measurement. The frequency drift is defined as a change in oscillator frequency when the ambient temperature varies from Tamb = 25 C to 50 C or from Tamb = 25 C to 0 C. The oscillator is free running during this measurement. Switch-on drift is defined as the change in oscillator frequency between 5 s and 15 min after switch on. The oscillator is free running during this measurement. The supply ripple susceptibility is measured in the circuit according to Figure 7 using a spectrum analyzer connected to the IF output. An unmodulated RF signal is applied to the test board RF input. A sinewave signal with a frequency of 500 kHz is superimposed onto the supply voltage. The amplitude of this ripple signal is adjusted to bring the 500 kHz sidebands around the IF carrier to a level of -53.5 dB with respect to the carrier.
Table 22: IF amplifier VCC = 5 V; Tamb = 25 C; values are given for an IF amplifier with 500 load (measured as shown in Figure 7 for the PAL standard); unless otherwise specified. Symbol IF amplifier S22 Zo output reflection coefficient magnitude; see Figure 6 phase; see Figure 6 output impedance (RS + jLS) RS at 36.15 MHz CS at 36.15 MHz RS at 43.5 MHz CS at 43.5 MHz Rejection at the IF output INTdiv INTXTAL INTfref level of divider interferences in the IF signal worst case
[1]
Parameter
Conditions
Min 60 60
Typ 38 0.36 79 9 80 3 66 66
Max 23 -
Unit dB deg nF nF dBV dBc dBc
crystal oscillator interferences VIF = 100 dBV; worst case in the rejection frequency range reference frequency rejection VIF = 100 dBV; worst case in the frequency range
[2]
[3]
[1] [2] [3]
This is the level of divider interferences close to the IF. For example channel S3: fosc = 158.15 MHz, 14fosc = 39.5375 MHz. The LOSCIN input must be left open (i.e. not connected to any load or cable); the HOSCIN1 and HOSCIN2 inputs are connected to a hybrid. Crystal oscillator interference means the 4 MHz sidebands caused by the crystal oscillator. The rejection has to be greater than 60 dB for an IF output signal of 100 dBV. The reference frequency rejection is the level of reference frequency sidebands (e.g. 62.5 kHz) related to the carrier. The rejection has to be greater than 60 dB for an IF output signal of 100 dBV.
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
21 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
1 0.5 2
0.2
5 10
+j 0 -j 0.2 0.5
1 50 MHz 2 30 MHz
5
10
10
0.2
5
0.5 1
2
mce152
Fig 6. Output impedance (S22) of the IF amplifier (30 MHz to 50 MHz); Zo = 50 Table 23: AGC output VCC = 5 V; Tamb = 25 C; values are given for an IF amplifier with 500 load (measured as shown in Figure 7 for the PAL standard); unless otherwise specified. Symbol AGCTOP Isource(fast) Isource(slow) Isink(peak) Vmax Vmin VRF(slip) Parameter AGC take-over point source current 1 source current 2 peak sink current to ground AGC maximum output voltage AGC minimum output voltage RF voltage range to switch the AGC from active to not active mode AGC output voltage AGC output voltage AGC leakage current AGC bit = 1 or AGC active AGC bit = 0 or AGC not active AL2 = 1; AL1 = 1; AL0 = 0; 0 V < VAGC < VCC Conditions AL2 = 0; AL1 = 1; AL0 = 0 Min 110.5 8.0 210.0 80 3.45 0 Typ 112 9.5 245.0 100 3.5 Max 113.5 11.0 280.0 120 4.0 0.1 0.5 Unit dBV A nA A V V dB
VRM(L) VRM(H) ILO VO(off)
0 3 -50 3.45
3.5 3.5
2.9 4.0 +50 4.0
V V nA V
AGC output voltage with AGC AL2 = 1; AL1 = 1; AL0 = 1 disabled
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
22 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
12. Application information
12.1 Tuning amplifier
The tuning amplifier is capable of driving the varicap voltage without an external transistor. The tuning voltage output must be connected to an external load of 27 k which is connected to the tuning voltage supply rail. The loop filter design depends on the oscillator characteristics and the selected reference frequency.
12.2 Crystal oscillator
The crystal oscillator uses a 4 MHz crystal connected in series with an 18 pF capacitor thereby operating in the series resonance mode. Connecting the crystal to the ground is preferred, but it can also be connected to the supply voltage.
12.3 Examples of I2C-bus control
Conditions: fosc = 100 MHz P0 = on (to switch on low band) P3 = on ICP = 280 A fstep = 62.5 kHz N = 1600 fXTAL = 4 MHz IAGC = 245 nA AGC take-over point = set to 112 dBV asymmetrical
12.3.1 Write sequence
Table 24 to 29 show various write sequences where: S = START A = acknowledge P = STOP For the complete sequence see Table 24 (sequence 1) or Table 25 (sequence 2). Other I2C-bus addresses may be selected by applying an appropriate voltage to pin AS.
Table 24: Start S Table 25: Start S
9397 750 15057
Complete sequence 1 Address byte C2 A Divider byte 1 06 A Divider byte 2 40 A Control byte CE A Band switch Control byte byte 09 A DE A Auxiliary byte 20 A Stop P
Complete sequence 2 Address byte C2 A Control byte DE A Auxiliary byte 20 A Control byte CE A Band switch Divider byte byte 1 09 A 06 A Divider byte 2 40 A Stop P
23 of 37
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
Table 26: Start S Table 27: Start S Table 28: Start S Table 29: Start S
Divider bytes only sequence Address byte C2 A Divider byte 1 06 A Divider byte 2 40 A Stop P
Control and band switch bytes only sequence Address byte C2 A Control byte CE A Band switch byte 09 A Stop P
Control and auxiliary bytes only sequence Address byte C2 A Control byte DE A Auxiliary byte 20 A Stop P
Control byte only sequence Address byte C2 A Control byte DE A Stop P
12.3.2 Read sequence
Table 30 and 31 show read sequences where: S = START A = acknowledge XX = read status byte X = no acknowledge from the master means end of sequence P = STOP
Table 30: Start S Table 31: Start S Status byte acquisition Address byte C3 A Status byte XX X Stop P
Two status bytes acquisition Address byte C3 A Status byte 1 XX A Status byte 2 XX X Stop P
13. Test information
13.1 Measurement circuit
The measurement circuit for PAL on a test jig is given in Figure 7 and the components are given in Table 32.
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
24 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
R5 22 k D1 BB182
C3 82 pF L1 6t; 4 mm
C1 1.8 pF C2
LOSCIN
1 (32)
(1) 32
MHBIN2
C17
MHBIN2
4.7 nF C18
LOSCOUT
2 (31)
(2) 31
MHBIN1
MHBIN1
4.7 nF C19
R1 12
1.5 pF
OSCGND
3 (30)
(3) 30
LBIN
LBIN
4.7 nF
R6 22 k D2 BB178
C6 100 pF L2 3t; 2 mm
C4 1 pF C5
MOSCOUT
4 (29)
(4) 29
RFGND
MOSCIN
5 (28)
(5) 28
IFFIL2
L4 2 x 6t
C20 12 pF C21 12 pF
R2 5.6
1.5 pF C7
HOSCIN1
6 (27)
(6) 27
IFFIL1
R7 5.6 k D3 BB179
C11 27 pF
R3 27 L3 3t; 2 mm
1.2 pF C8
HOSCOUT2
7 (26)
(7) 26
P2 TP 1
R11 1 k C22 160 nF R12 220
D4 LED
1.2 pF C9
HOSCOUT1
8 (25)
(8) 25
AGC
1.2 pF R4 5.6 k C10 1.2 pF C12 4.7 nF
HOSCIN2
TDA6500TT (TDA6501TT)
9 (24) (9) 24 P1
D5 LED D6 LED D7 LED
VCC
10 (23)
(10) 23
P0
R13 470 R14 1 k
for test purpose only IFOUT measurement
L5 680 nH C27 22 pF C28 3.9 pF C13 4.7 nF
IFGND
11 (22)
(11) 22
P3
IFOUT
12 (21)
(12) 21
AS
R16 0
PLLGND 13 (20)
X1
(13) 20
SCL
R17 330 R18 330
for test purpose only
C14 18 pF
XTAL
4 MHz
14 (19)
(14) 19 SDA
VT TP 2
R21 C23 10 nF 3.9 k R19 18 k C16 820 pF R10 27 k JP2 C15 100 nF
15 (18)
(15) 18
P6/ADC
R20
1/2fref or 1/2fdiv
CP
16 (17)
(16) 17
P4
4.7 k
R15 2.2 k
JP1
6
R22 Q1 BC847 JP3 JUMPER
5 SCL
4 AS
3 GND
2 5V
1 n.c.
SDA
4 VCC 5V
3
2 GND
1 33 V
C25 10 F
6.8 k C26 10 F
for test purpose only
VCC
fce828
The pin numbers in parenthesis represent the TDA6501TT.
Fig 7. Measurement circuit for PAL on test jig
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
25 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
Components for measurement circuit Value 1.8 pF (N750) 1.5 pF (N750) 82 pF (N750) 1 pF (N750) 1.5 pF (N750) 100 pF (N750) 1.2 pF (N750) 1.2 pF (N750) 1.2 pF (N750) 1.2 pF (N750) 27 pF (N750) 4.7 nF 4.7 nF 18 pF 12 5.6 27 5.6 k 22 k 22 k 5.6 k 27 k 1 k BB182 BB178 BB179 R12 R13 R14 R15 R16 R17 R18 R19 R20 D4 D5 D6 D7 220 470 1 k 2.2 k 0 330 330 18 k 4.7 k 3 mm 3 mm 3 mm 3 mm 2 x 6 t; coil type: TOKO 7kN; material: 113 kN; screw core: 03-0093; pot core: 04-0026 Component C15 C16 C17 C18 C19 C20 C21 C22 C23 C25 C26 C27 C28 Value 100 nF 820 pF 4.7 nF 4.7 nF 4.7 nF 12 pF 12 pF 160 nF 10 nF 10 F (16 V; electrolytic) 10 F (16 V; electrolytic) 22 pF 3.9 pF
Table 32:
Component C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 R1 R2 R3 R4 R5 R6 R7 R10 R11 D1 D2 D3
Capacitors; all SMD and NP0, unless otherwise stated
Resistors; all SMD
Diodes and LEDs
Coils; including IF coil; wire size 0.4 mm L1 L2 L3 L5 IC Q1 6 t; 4 mm 3 t; 2 mm 3 t; 2 mm 680 nH TDA6500TT; TDA6501TT BC847 X1 4 MHz L4
IC, transistor and crystal
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
26 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
13.2 Test circuit for low band measurements
signal source LBIN IFOUT
50
L
spectrum analyzer Vo
C
e
Vmeas V
50
Vi
DUT
V'meas
50
RMS voltmeter
fce213
Zi >> 50 Vi = 2 x Vmeas = 80 dBV Vi = Vmeas + 6 dB = 80 dBV Vo = V'meas x ------------------------------- = V'meas + attenuation -
50
50 + L
2
2
2
Gv = 20 log ----PAL: IF = 38.9 MHz; L = 680 nH; C = 25.9 pF and attenuation = 10.2 dB
Vo Vi
Fig 8. Gain (GV) measurement in low band
I1 BNC
C1
PCB BNC C3
I3
PCB
plug
L1 C2
I2
plug RIM-RIM
RIM-RIM
C4
001aad065
mbe286
a. fRF = 50 MHz
Low band mixer frequency response measured = 57 MHz; loss = 0 dB; image suppression = 16 dB. C1 = 9 pF. C2 = 15 pF. L1 = 7 turns ( 5.5 mm, wire = 0.5 mm). l1 = semi rigid cable (RIM): 5 cm long; 33 dB/100 m; 50 ; 96 pF/m
b. fRF = 150 MHz
Low band mixer frequency response measured = 150.3 MHz; loss = 1.3 dB; image suppression = 13 dB. C3 = 5 pF. C4 = 25 pF. l2 = semi rigid cable (RIM): 30 cm long; 33 dB/100 m; 50 96 pF/m. l3 = semi rigid cable (RIM): 5 cm long; 33 dB/100 m; 50 96 pF/m.
Fig 9. Input circuit for optimum noise figure in the low band
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
27 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
NOISE SOURCE
L
BNC INPUT CIRCUIT
RIM
LBIN
IFOUT
NOISE FIGURE METER
DUT
C
fce214
NF = NFmeas - loss of input circuit PAL: IF = 38.9 MHz; L = 680 nH; C = 25.9 pF
Fig 10. Noise figure (NF) measurement in low band
50
signal source LBIN IFOUT
L
spectrum analyzer
C 50
e
Vmeas V
50
Vi
DUT
RMS voltmeter
fce219
Zi >> 50 Vi = 2 x Vmeas = Vmeas + 6 dB PAL: IF = 38.9 MHz; L = 680 nH; C = 25.9 pF
Fig 11. Maximum RF input level without lock-out in low band
FILTER
50
AM = 30% 2 kHz unwanted signal source A C LBIN IFOUT
L
18 dB attenuator
modulation analyzer
eu
50
HYBRID
DUT
Vo
C
V Vmeas
38.9 MHz (PAL & OFDM)
50
ew
wanted signal source
B
D
50
RMS voltmeter
fce827
Vo = Vmeas x ------------------------------- = Vmeas + attenuation -
50
50 + L
2
2
2
Wanted output signal at fRFpix; Vo = 100 dBV. Unwanted output signal at fRFpix + 5.5 MHz. The level of unwanted signal is measured by causing 0.09 % AM modulation in the wanted signal. PAL: IF = 38.9 MHz; L = 680 nH; C = 25.9 pF and attenuation = 10.2 dB
Fig 12. Cross modulation measurement in low band
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
28 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
13.3 Test circuit for mid and high band measurements
signal source A C MHBIN1 IFOUT
50
L
spectrum analyzer
C
e
Vmeas V
50
Vi
HYBRID
DUT
Vo MHBIN2
V'meas
50
B RMS voltmeter
50
D
fce216
Loss in hybrid = 1 dB. Vi = Vmeas - loss = 70 dBV Vo = V'meas x ------------------------------- = V'meas + attenuation -
50
50 + L
2
2
2
Gv = 20 log ----PAL: IF = 38.9 MHz; L = 680 nH; C = 25.9 pF and attenuation = 10.2 dB
Vo Vi
Fig 13. Gain (GV) measurement in mid and high bands
NOISE SOURCE
L
A
C
MHBIN1
IFOUT
NOISE FIGURE METER
HYBRID
DUT
MHBIN2
C
B
50
D
fce217
Loss in hybrid = 1 dB. NF = NFmeas - loss. PAL: IF = 38.9 MHz; L = 680 nH; C = 25.9 pF
Fig 14. Noise figure (NF) measurement in mid and high bands
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
29 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
FILTER AM = 30% 2 kHz 50 eu unwanted signal source
50 L
12 dB attenuator
A
C
A
C
MHBIN1
IFOUT 38.9 MHz (PAL & OFDM)
HYBRID
HYBRID
DUT
MHBIN2
Vo
C
V Vmeas
50
ew
wanted signal source
B
D
50 50
B
D
RMS voltmeter
fce829
Vo = Vmeas x ------------------------------- = Vmeas + attenuation -
50
50 + L
2
2
2
Wanted output signal at fRFpix; Vo = 100 dBV. Unwanted output signal at fRFpix + 5.5 MHz. The level of unwanted signal is measured by causing 0.09 % AM modulation in the wanted signal. PAL: IF = 38.9 MHz; L = 680 nH; C = 25.9 pF and attenuation = 10.2 dB
Fig 15. Cross modulation measurement in mid and high bands
50
signal source A C MHBIN1 IFOUT
L
spectrum analyzer
C 50
e
Vmeas V
50
Vi
HYBRID
DUT
MHBIN2
B RMS voltmeter
50
D
fce220
Loss in hybrid = 1 dB. Vi = Vmeas - loss. PAL: IF = 38.9 MHz; L = 680 nH; C = 25.9 pF
Fig 16. Maximum RF input level without lock-out in mid and high bands
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
30 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
14. Package outline
TSSOP32: plastic thin shrink small outline package; 32 leads; body width 6.1 mm; lead pitch 0.65 mm
SOT487-1
D
E
A
X
c y HE vMA
Z
32
17
A2 A1 pin 1 index Lp L
(A 3)
A
1
e
16
bp wM
detail X
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.1 A1 0.15 0.05 A2 0.95 0.85 A3 0.25 bp 0.30 0.19 c 0.20 0.09 D(1) 11.1 10.9 E(2) 6.2 6.0 e 0.65 HE 8.3 7.9 L 1 Lp 0.75 0.50 v 0.2 w 0.1 y 0.1 Z 0.78 0.48 8 o 0
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT487-1 REFERENCES IEC JEDEC MO-153 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18
Fig 17. Package outline SOT487-1 (TSSOP32)
9397 750 15057 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
31 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
15. Soldering
15.1 Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended.
15.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Driven by legislation and environmental forces the worldwide use of lead-free solder pastes is increasing. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 seconds and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 C to 270 C depending on solder paste material. The top-surface temperature of the packages should preferably be kept:
* below 225 C (SnPb process) or below 245 C (Pb-free process)
- for all BGA, HTSSON..T and SSOP..T packages - for packages with a thickness 2.5 mm - for packages with a thickness < 2.5 mm and a volume 350 mm3 so called thick/large packages.
* below 240 C (SnPb process) or below 260 C (Pb-free process) for packages with a
thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages. Moisture sensitivity precautions, as indicated on packing, must be respected at all times.
15.3 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
* Use a double-wave soldering method comprising a turbulent wave with high upward
pressure followed by a smooth laminar wave.
* For packages with leads on two sides and a pitch (e):
- larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board;
9397 750 15057 (c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
32 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
- smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end.
* For packages with leads on four sides, the footprint must be placed at a 45 angle to
the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time of the leads in the wave ranges from 3 seconds to 4 seconds at 250 C or 265 C, depending on solder material applied, SnPb or Pb-free respectively. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
15.4 Manual soldering
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 seconds to 5 seconds between 270 C and 320 C.
15.5 Package related soldering information
Table 33: Package [1] BGA, HTSSON..T [3], LBGA, LFBGA, SQFP, SSOP..T [3], TFBGA, VFBGA, XSON DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP, HSQFP, HSSON, HTQFP, HTSSOP, HVQFN, HVSON, SMS PLCC [5], SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP CWQCCN..L [8], PMFP [9], WQCCN..L [8]
[1] [2]
Suitability of surface mount IC packages for wave and reflow soldering methods Soldering method Wave not suitable not suitable [4] Reflow [2] suitable suitable
suitable not not recommended [5] [6] recommended [7]
suitable suitable suitable not suitable
not suitable
For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026); order a copy from your Philips Semiconductors sales office. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 C 10 C measured in the atmosphere of the reflow oven. The package body peak temperature must be kept as low as possible.
[3]
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
33 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
[4]
These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered pre-mounted on flex foil. However, the image sensor package can be mounted by the client on a flex foil by using a hot bar soldering process. The appropriate soldering profile can be provided on request. Hot bar soldering or manual soldering is suitable for PMFP packages.
[5] [6] [7] [8]
[9]
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
34 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
16. Revision history
Table 34: Revision history Release date 20050614 Data sheet status Product data sheet Change notice Doc. number 9397 750 15057 Supersedes TDA6500_TDA6501_1 Document ID TDA6500_TDA6501_2 Modifications:
* *
The format of this data sheet has been redesigned to comply with the new presentation and information standard of Philips Semiconductors. Table 23 "AGC output": maximum values of Vmax, VRM(H) and VO(off) changed from 3.6 V to 4.0 V. Product specification 9397 750 10109 -
TDA6500_TDA6501_1
20030605
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
35 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
17. Data sheet status
Level I II Data sheet status [1] Objective data Preliminary data Product status [2] [3] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).
III
Product data
Production
[1] [2] [3]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
18. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
20. Trademarks
Notice -- All referenced brands, product names, service names and trademarks are the property of their respective owners. I2C-bus -- wordmark and logo are trademarks of Koninklijke Philips Electronics N.V.
19. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors
21. Contact information
For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
9397 750 15057
(c) Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 -- 14 June 2005
36 of 37
Philips Semiconductors
TDA6500; TDA6501
5 V mixer/oscillator and synthesizer for PAL and NTSC standards
22. Contents
1 2 3 4 5 6 6.1 6.2 7 7.1 7.2 7.2.1 7.2.2 7.2.3 8 9 10 11 12 12.1 12.2 12.3 12.3.1 12.3.2 13 13.1 13.2 13.3 14 15 15.1 15.2 15.3 15.4 15.5 16 17 18 19 20 21 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Device control . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Write mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Power-on reset . . . . . . . . . . . . . . . . . . . . . . . . 10 Internal circuitry. . . . . . . . . . . . . . . . . . . . . . . . 11 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 15 Thermal characteristics. . . . . . . . . . . . . . . . . . 15 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 16 Application information. . . . . . . . . . . . . . . . . . 23 Tuning amplifier. . . . . . . . . . . . . . . . . . . . . . . . 23 Crystal oscillator . . . . . . . . . . . . . . . . . . . . . . . 23 Examples of I2C-bus control . . . . . . . . . . . . . . 23 Write sequence. . . . . . . . . . . . . . . . . . . . . . . . 23 Read sequence. . . . . . . . . . . . . . . . . . . . . . . . 24 Test information . . . . . . . . . . . . . . . . . . . . . . . . 24 Measurement circuit . . . . . . . . . . . . . . . . . . . . 24 Test circuit for low band measurements . . . . . 27 Test circuit for mid and high band measurements . . . . . . . . . . . . . . . . . . . . . . . . 29 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 31 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Introduction to soldering surface mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 32 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 32 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 33 Package related soldering information . . . . . . 33 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 35 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 36 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Contact information . . . . . . . . . . . . . . . . . . . . 36
(c) Koninklijke Philips Electronics N.V. 2005
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 14 June 2005 Document number: 9397 750 15057
Published in The Netherlands

▲Up To Search▲

Price & Availability of TDA6500

	To Download TDA6500 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .